Struct mcpat_sys::root_system

pub struct root_system {
    pub number_of_cores: c_int,
    pub number_of_L1Directories: c_int,
    pub number_of_L2Directories: c_int,
    pub number_of_L2s: c_int,
    pub Private_L2: c_bool,
    pub number_of_L3s: c_int,
    pub number_of_NoCs: c_int,
    pub number_of_dir_levels: c_int,
    pub domain_size: c_int,
    pub first_level_dir: c_int,
    pub homogeneous_cores: c_int,
    pub homogeneous_L1Directories: c_int,
    pub homogeneous_L2Directories: c_int,
    pub core_tech_node: c_double,
    pub target_core_clockrate: c_int,
    pub target_chip_area: c_int,
    pub temperature: c_int,
    pub number_cache_levels: c_int,
    pub L1_property: c_int,
    pub L2_property: c_int,
    pub homogeneous_L2s: c_int,
    pub L3_property: c_int,
    pub homogeneous_L3s: c_int,
    pub homogeneous_NoCs: c_int,
    pub homogeneous_ccs: c_int,
    pub Max_area_deviation: c_int,
    pub Max_power_deviation: c_int,
    pub device_type: c_int,
    pub longer_channel_device: c_bool,
    pub power_gating: c_bool,
    pub Embedded: c_bool,
    pub opt_dynamic_power: c_bool,
    pub opt_lakage_power: c_bool,
    pub opt_clockrate: c_bool,
    pub opt_area: c_bool,
    pub interconnect_projection_type: c_int,
    pub machine_bits: c_int,
    pub virtual_address_width: c_int,
    pub physical_address_width: c_int,
    pub virtual_memory_page_size: c_int,
    pub total_cycles: c_double,
    pub vdd: c_double,
    pub power_gating_vcc: c_double,
    pub core: [system_core; 64],
    pub L1Directory: [system_L1Directory; 64],
    pub L2Directory: [system_L2Directory; 64],
    pub L2: [system_L2; 64],
    pub L3: [system_L3; 64],
    pub NoC: [system_NoC; 64],
    pub mem: system_mem,
    pub mc: system_mc,
    pub flashc: system_mc,
    pub niu: system_niu,
    pub pcie: system_pcie,
}

Fields

number_of_cores: c_int

number_of_L1Directories: c_int

number_of_L2Directories: c_int

number_of_L2s: c_int

Private_L2: c_bool

number_of_L3s: c_int

number_of_NoCs: c_int

number_of_dir_levels: c_int

domain_size: c_int

first_level_dir: c_int

homogeneous_cores: c_int

homogeneous_L1Directories: c_int

homogeneous_L2Directories: c_int

core_tech_node: c_double

target_core_clockrate: c_int

target_chip_area: c_int

temperature: c_int

number_cache_levels: c_int

L1_property: c_int

L2_property: c_int

homogeneous_L2s: c_int

L3_property: c_int

homogeneous_L3s: c_int

homogeneous_NoCs: c_int

homogeneous_ccs: c_int

Max_area_deviation: c_int

Max_power_deviation: c_int

device_type: c_int

longer_channel_device: c_bool

power_gating: c_bool

Embedded: c_bool

opt_dynamic_power: c_bool

opt_lakage_power: c_bool

opt_clockrate: c_bool

opt_area: c_bool

interconnect_projection_type: c_int

machine_bits: c_int

virtual_address_width: c_int

physical_address_width: c_int

virtual_memory_page_size: c_int

total_cycles: c_double

vdd: c_double

power_gating_vcc: c_double

core: [system_core; 64]

L1Directory: [system_L1Directory; 64]

L2Directory: [system_L2Directory; 64]

L2: [system_L2; 64]

L3: [system_L3; 64]

NoC: [system_NoC; 64]

mem: system_mem

mc: system_mc

flashc: system_mc

niu: system_niu

pcie: system_pcie